The new chip conveniently fills the gap in Qualcomm's product line for SoCs with integrated baseband between the low-to-mid-range Snapdragon 400/410 and the high-end Snapdragon 801, which have a large performance and cost difference, as for some time Qualcomm has offered no competitive smartphone solution with performance falling in between for the performance mid-range category.
While the SoC appears to offer good mid-range CPU and GPU performance, based on early evidence its power efficiency appears to be less than what one would expect based on its utilization of low-power Cortex-A53 cores.
DRAM interface appears to be 32-bit after all
Early data suggested that Snapdragon 615 (MSM8389) would utilize a relatively relatively wide 64-bit external DRAM interface, which is not typical of cost-sensitive devices because it significantly increases the cost of the PCB design, chip as well as other components. A 64-bit DRAM interface would mean that memory bandwidth is relatively high and that the chip would run relatively smoothly at resolutions such as FullHD (1920x1080) at higher.
However, more recent sources as of December 2014 (including Qualcomm's website) indicate the chip uses a cost-effective 32-bit DRAM interface with support for LPDDR3 up to 800 MHz, resulting in memory bandwidth of 6.4 GB/s, comparable with other cost-effective mid-range SoCs, which can lead to constrained performance when running at high resolutions such as 1920x1080.
GPU appears to have strong pixel processing capabilities, but is limited by memory bandwidth
The Adreno 405 GPU provides adequate performance for a mid-range SoC, comparable in benchmarks such as the GFXBench T-Rex and Manhattan tests to that of MediaTek's new MT6752 (also an octa-core Cortex-A53-based SoC with a 32-bit memory interface, in conjunction with a Mali-T760 MP2 GPU), while being roughly three times faster than the GPU in the low-to-mid-range Snapdragon 400/410 platforms.
In GFXBench subtests, the ALU and Alpha Blending benchmark results are particularly high for a mid-range device and close to the scores achieved by higher-end chips from competitors such as Kirin 920 and Exynos 5 Octa, which have Mali-T628 MP4 and Mali-T628 MP6 GPUs and a wider DRAM interface. However, the pixel fill rate is lower and probably provides a bottleneck because of the memory bandwidth limitation. This could suggest that the GPU inside the chip is larger and higher powered than it needs to be, stemming from original plans for a 64-bit DRAM interface on the SoC. In comparison, the Mali-T760 MP2 as implemented in the MT6752 has less processing power but implements bandwidth-saving techniques from ARM that improve performance in a bandwidth -constrained environment.
The 32-bit memory interface and resulting memory bandwidth bottleneck probably means that devices using the SoC will run significantly smoother (especially in games) with better battery life when using a screen with a lower resolution screen like 1280x720, while a resolution 1920x1080 will make the memory interface the bottleneck, also resulting in shorter battery life. A similar phenomenon is seen with other relatively high-powered SoCs with limited memory bandwidth, such as MediaTek's previous generation MT6592.
SoC design shows some signs of cost-reduction measures, including use of 28LP process
Benchmark scores and GPU performance illustrate that this is not a high-end chip and that Qualcomm has reduced cost in a number of ways, reducing CPU and GPU performance. A likely factor is a smaller amount and slower L2 cache memory when compared to higher-end SoCs, as well as the relatively limited memory bandwidth provided by the 32-bit DRAM interface.
Another major factor is that, despite being a relatively performance-oriented chip, it is manufactured using TSMC's relatively economical and low-performance 28LP process (also used for Snapdragon 400/410), which limits clock rates and power efficiency. Other chips, like the Snapdragon 800 series and most of MediaTek's mid-range solutions like MT6752 are manufactured using the higher-performance 28HPM process at TSMC, which provides significantly better performance (higher clock rates) and lower power consumption.
Reduced cost and die size lowers wafer requirements
By migrating part its performance-mid-range SoC offerings from the Snapdragon 800 series to Snapdragon 615, Qualcomm is effectively reducing its wafer requirements at TSMC (especially for HPM), because Snapdragon 615 is likely to have a much smaller die size than the relatively large Snapdragon 801 (the total area for the CPU cores is much smaller, despite there being twice as many cores) and more chips can be manufactured on a single wafer. Qualcomm also saves a significant amount of cost this way (although in the past, Qualcomm's patent royalty leverage has meant that the chip margins were not as important as they might be for other companies).
Reviews and benchmark scores show mediocre battery life and power efficiency
Contrary to initial expectations from the use of power efficient Cortex-A53 CPU cores in a pseudo big.LITTLE configuration, Snapdragon 615 does not appear to be very power efficient, resulting in mediocre battery life in end devices. The Snapdragon 615-based Oppo R5 shows poor battery life in a review by GSMArena, partly because of the high resolution 1080p AMOLED screen. The SoC is likely to be less efficient with resolutions of 1080p and higher.
In the GFXBench long-term performance benchmark for the HTC Desire 820, GPU performance is sustained close to the maximum level, but with a relatively mediocre battery lifetime score of 153 minutes, which is lower than almost all other modern smartphones. A review of the same device by Android Central noted that battery life was reasonable although not spectacular. The HTC model uses a 720p resolution which is likely to result in more acceptable battery life than devices running at 1080p.
Part the reason for the relatively high power consumption is likely to be the use of the less efficient 28LP semiconductor process at TSMC, in conjunction with a relatively powerful GPU with a relatively large die size (which is however limited by memory bandwidth). The Cortex-A53 cores may also perform worse, with higher power consumption, when compared with implementations using the 28HPM process such as MediaTek's Cortex-A53-based designs.
Is Cortex-A53 less power-efficient than expected?
Based on its similarities with the very power efficient Cortex-A7 core, one would expect Cortex-A53 to be a relatively power efficient CPU core, and in that sense the power efficiency of the Cortex-A53-only Snapdragon 615 might be considered disappointing. However, in the case of Snapdragon 615, there are important factors that reduce the power efficiency of the implementation. The 28LP process is a major factor, as well as presumably the relatively high-powered GPU . The 32-bit memory interface in conjunction with the relatively powerful multi-core CPU and GPU can cause memory bus contention due to insufficient bandwidth, resulting in relatively heavy DRAM access patterns.
Another factor could be the r0p1 revision of the Cortex-A53 core; progressive revisions of the core show indications of increased performance and efficiency. MediaTek uses revision r0p2 in its MT67xx family, as well as using the more efficient 28HPM process at TSMC. Samsung has already been shipping the 20 nm-manufactured Exynos 7 Octa (5433) for several months which also uses Cortex-A53 to good effect as the power efficient part of its CPU configuration.
The bandwidth-saving techniques of the Mali-T760 GPU (used by both MediaTek and Samsung) and other ARM IP blocks is likely to contribute to reduced power consumption. Battery life benchmarks and reviews for the MT6732 and MT6752, when they become available, will help clarify whether an octa-core Cortex-A53 with a 32-bit memory interface can in fact provide low power consumption and long battery life.
Sources: Wikipedia (Snapdragon page), Qualcomm (Snapdragon processor page), GFXBench results browser, GSMArena, Android Central
Updated January 2, 2015.